The invention pertains to the field of servo systems, and, more particularly, to the field of servo data demodulator circuits for disk drive head control servo systems.
Disk drive head control servo systems serve to move the read/write heads to the proper track in a seek mode, and to maintain the heads over the proper track during a tracking mode to read or write data. To do this function, the servo system needs to generate and process certain control signals which signal track crossings in the seek mode and positional error of the heads over the selected track in the tracking mode.
The positional error signal is generated by sampling a signal from a servo head which reads data from servo tracks. The magnitude of the peaks are then compared to generate a positional error signal which indicates the amount and direction of error between the actual head position and the desired head position over the selected track.
In the prior art, servo data demodulators consisted of four peak detectors coupled to the single input signal line through a multiplexer. The peak detectors were each connected to the input signal at a different time and detected the peak amplitude of the signal at that time. The outputs of the peak detectors were then compared by applying them to the inputs of differential amplifiers whose outputs represented the differences between selected peaks. These difference outputs could be used to generate the position error signals. Such an arrangement is shown in FIG. 1. Most current disk drive manufacturers who use closed loop head positioning use this multiple peak detector architecture.
This prior art approach had several problems. Chief among them was inaccuracy. The inaccuracy stems from several sources. First, the multiplexer switches would have to be switching transistors which are integrated and placed in series with the signal to be measured. This would cause an inaccuracy because of the offset voltage of the switching transistor, i.e., the collector to emitter saturation voltage if saturating bipolar transistors are used, would be imposed between the voltage source to be measured and the charge storage capacitor. This would change the detected peak by the offset voltage of the switch. If the switches were not matched, or the peak detectors were not matched, then the detected peaks would have indicated magnitudes which were not their true magnitudes. The result would be a position error signal which was erroneous when the peaks were compared by the difference amplifier.
A further problem with the prior art approach is the problem of discharging of the capacitor in the peak detectors. The voltage of the capacitor of the peak detector follows the input signal as it rises. When the input signal amplitude begins to fall, the peak detector "freezes" the voltage on the capacitor at the peak voltage. Once this occurs, the capacitor begins to discharge slowly. This discharge occurs because of leakage across imperfect switches and through the input impedance of following stages and because of a designed-in leakage to allow the capacitor to discharge to a low enough value to be able to detect the peak in the next frame sample window. The same is true for each of the four channels.
To get an accurate position error signal, the difference between the peak voltages of the adjacent channels must be detected. But since the peak voltage stored on each capacitor is decaying over time, and the comparison of A to B cannot occur until the B channel has been sampled some time after A has been sampled, the voltage on the capacitor of the peak detector for the A channel will have partially decayed by the time the B sample has been taken. This difference could be compensated for if the rate of decay was linear or known and predictable and the relative sampling times were known. However, the rate of decay of the capacitor must be fast enough so that the capacitor voltage decays to a low enough value so as to be lower than the next peak to be detected. Effectively, this requires the decay to be to the lowest expected value in the range of input voltages expected from the time of one sample by a peak detector and the next sample by the peak detector. If this were not so, the next peak would not be detected, i.e., if the capacitor's initial voltage was already higher than the peak input signal magnitude existing at the time of the sample. To insure that all peaks are detected, the prior art sometimes uses an adaptive rate of discharge to change the rate of discharge of each peak detector's capacitor to increase the rate of discharge for input signals which are rapidly decreasing or decrease the rate of discharge for input signals which are not decreasing rapidly.
This type of prior art approach creates several problems. First, since the rate of discharge is changing, the error created by the amount of discharge on the A channel before sampling by the B channel changes and cannot be corrected for unless complicated circuitry is designed to remember the rate of discharge on each channel between each frame and correct for that particular discharge amount before comparing the sampled peak to the peak of the adjacent, later sampled channel. Further, complicated circuitry must exist to sense the rate of decrease of the input signal and change the discharge rate on each channel to adapt it for the rate of input signal decrease from one frame to the next.
Another problem with the above noted prior art servo data demodulator architecture and method is the error spikes which are generated each frame in the position error signal when the heads are actually on track. This concept will be best understood by reference to FIGS. 2 and 3.
FIG. 2 shows the outputs, i.e., the voltages on the peak detectors A and B for one frame when the servo head is on track, while FIG. 3 shows the resulting position error signal derived by subtracting the B output from the A output. When the heads are on track, the position error signal is supposed to be zero. However, with the prior art structure, a small error spike representing a false position error will be generated every frame because of the arrangement of the components and the method of sampling used. The reason these error spikes are generated is because a continuous comparison is made of the peak detector outputs while the peak detector outputs of adjacent channels can be validly be compared only at the time of sampling by the peak detector which samples later in time.
When peak detector 1 detects the peak on the A channel, its output is compared immediately with the output of peak detector 2 for the B channel by the output differential amplifier DIFF AMP 1 at time t0. Because the B channel peak detector has not yet taken its sample, the capacitor C2 voltage will have decayed from whatever peak was detected during the last data frame. The position error signal PES1 at time t0 assumes an erroneous positive value V1 equal to the peak value detected by the A channel peak detector less whatever voltage is then on the capacitor C2 of the B channel peak detector at the time t0. This is the voltage V1 indicated at the time t0 in FIG. 3. Prior to the time t0 (except for the rise time to the voltage at time t0), the position error signal PES1 would be some false negative value V0 which is equal to the difference between the voltages on the A and B channel peak detector capacitors C1 and C2 as they decay in unison from whatever peaks that were detected during the last data frame.
As the voltage on the A channel storage capacitor C1 decays after the time t0, so does the voltage on the B channel peak detector capacitor C2 continue to decay at the same rate. The position error signal PES1 during this period will be approximately constant at the false positive value assumed at the time t0. At time t1, the multiplexer connects the B channel peak detector to the input signal, and the B channel peak detector begins to charge up as shown by the transition 20 in FIG. 2. At time t3, the B channel peak detector is fully charged to the peak value. As the voltage on the capacitor C2 rises, the position error signal PES1 decreases. At a time t2 when the voltages on the A and B channel peak detector capacitors C1 and C2 equal each other, the position error signal PES1 will be zero. From the time t2 to the time t3, the signal PES1 continues to decrease to some false negative value V2 equal to the difference in voltage between the voltage on the capacitor C2 and the voltage on the capacitor C1, i.e., the voltage V2 in FIG. 3. After time t3, the position signal remains constant and equal to the voltage V2 as the capacitors C1 and C2 discharge at equal rates.
The value V2 of the position error signal at the time t3 is the amount of the error caused by the exponential decay on the A channel peak detector capacitor C1 during the period from the time of the A channel sample to the time of the B channel sample since the correct position error signal when the heads are on track is supposed to be zero.
Further, If the peak detectors for channels A through D are not well matched, the peaks for the A and B samples may not be equal when they are supposed to be. Subtracting two supposedly equal peaks which are not actually equal leads to a false indication of a positioning error when there is no error. This can lead to the positioning mechanism moving the servo and data heads off the track center when they were correctly centered to begin with.
The resultant spike in the position error signal renders it invalid for part of the frame. Further, because it is a fairly narrow pulse, it has a broad noise spectrum which can create electromagnetic interference and be coupled into any linear circuits in the system as noise.
There has developed a need for a simple, yet accurate servo data demodulator which does not suffer from the above noted deficiencies.